simulation clock

Simulation clock pushing is the key technique in DIS.

仿真时钟的推进是分布交互式仿真系统的关键技术.

E1 Circuit Simulation and Clock Synchronization Technology in EPON

EPON系统E1电路仿真及其时钟同步技术

Post simulation waveform has 15.02 ns delay time than system clock edge as add device andwire delay.

在加入了器件延迟与布线延迟后,后仿输出波形对于系统时钟有15.02ns的延迟.

In this paper, a conservative synchronization strategy based on Conservative Time Window ( CTW) is put forward considering the clock synchronization in the process of traffic network distribution simulation.

针对交通网络分布式仿真的时钟同步问题，提出了一种基于时间窗的保守性同步策略。

Electronic circuit design and simulation tool eda, used to simulate the work and display digital clock.

电子电路设计与仿真工具eda, 用来模拟数码时钟的工作和显示.

Monte Carlo Method Applied to Simulation of Atomic Clock Noise

原子钟噪声的蒙特卡络模拟方法